september 2010 doc id 17883 rev 1 1/10 10 esda-1k eos and esd transil? protection for charger and battery port features breakdown voltage: 12 v, 18 v unidirectional device high peak power dissipation: 450 w (8/20 s waveform) esd protection level better than iec 61000-4-2 level 4: 30 kv contact discharge. low leakage current < 0.5 a at 5 v pcb area: 1.3 mm 2 benefits high eos and esd protection level high integration suitable for high density board small package complies with the following standards iec 61000-4-2 level 4 ? 15 kv (air discharge) ? 8 kv (contact discharge) mil std 883g - method 3015-7 class 3b ? hbm (human body model): 8 kv applications where transient overvoltage protection in esd sensitive equipment is required, such as: computers printers communication systems cellular phone handsets and accessories video equipment figure 1. functional diagram description the esda-1k is a single line transil diode designed specifically for the protection of integrated circuits in portable equipment and miniaturized electronics devices subject to esd and eos transient overvoltages. tm : transil is a trademark of stmicroelectronics. sod-523 pin 1 pin 2 www.st.com
characteristics esda-1k 2/10 doc id 17883 rev 1 1 characteristics 0 figure 2. electrical characteristics (definitions) table 1. absolute maximum ratings (t amb = 25 c) symbol parameter value unit v pp peak pulse voltage iec 61000-4-2 air discharge iec 61000-4-2 contact discharge 30 30 kv t j operating junction temperature rage -40 to +150 c t stg storage temperature range -65 to +150 c t l maximum lead temperature for soldering during 10 s 260 c table 2. absolute maximum ratings (t amb = 25 c) - product specific parameters order code i pp (a) peak pulse current (8/20 s) p pp (w) peak pulse power (8/20 s) esda12-1k 16 450 ESDA18-1K 12 400 table 3. electrical characteristics (values, t amb = 25 c) order code v br @ i r i rm @ v rm v cl @ i pp (8/20 s) c line (1) 1. v r = 0 v, f osc = 1 mhz, v osc = 30 mv min. typ. max. max. max. max. vvmaavvava pf esda12-1k 12 13 1 0.5 10 16.5 1 28 16 150 ESDA18-1K 18 19 1 0.5 15 24 1 34 12 105 symbol parameter
esda-1k characteristics doc id 17883 rev 1 3/10 figure 3. peak pulse power dissipation versus exponential pulse duration (typical values) figure 4. peak pulse power dissipation versus initial junction temperature (typical values) 1 10 100 1000 10 100 1000 p pp (w) t j =25 c t p (s) esda12-1k ESDA18-1K 0 100 200 300 400 500 600 700 800 900 1000 25 50 75 100 125 150 175 8/20 s p (w) pp t (c) j ESDA18-1K esda12-1k figure 5. clamping voltage versus peak pulse current (typical values) figure 6. leakage current versus junction temperature (typical values) 0.1 1.0 10.0 100.0 0102030 8/20 s t initial = 25 c j v (v) cl i (a) pp ESDA18-1K esda12-1k 0.01 1.00 100.00 25 35 45 55 65 75 85 v = v = 10 v for esda12-1k v = v =1 5v for ESDA18-1K rrm rrm i (na) r t (c) j ESDA18-1K esda12-1k figure 7. esd response to iec 61000-4-2 (+15 kv air discharge) esda12-1k figure 8. esd response to iec 61000-4-2 (-15 kv air discharge) esda12-1k c2 5 v / div 100 ns / div c2 5 v / div 100 ns / div
ordering information scheme esda-1k 4/10 doc id 17883 rev 1 2 ordering information scheme figure 9. ordering information scheme esda xx - 1k esd array breakdown voltage package xx = 12: 12 v min. 1 = 1 line k = sod-523 xx = 18: 18 v min.
esda-1k package information doc id 17883 rev 1 5/10 3 package information epoxy meets ul94,v0 lead-free package in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark. note: product marking may be rotated by multiples of 90 for assembly plant differentiation. in no case should this product marking be used to orient the component for its placement on a pcb. only pin 1 mark is to be used for this purpose. table 4. sod-523 dimensions ref. dimensions millimeters inches min. typ. max. min. typ. max. a 0.50 0.60 0.70 0.020 0.024 0.028 e 1.50 1.60 1.70 0.059 0.063 0.067 e1 1.10 1.20 1.30 0.043 0.047 0.051 d 0.70 0.80 0.90 0.028 0.031 0.035 b 0.25 0.35 0.010 0.014 c 0.07 0.20 0.003 0.008 l 0.15 0.20 0.25 0.006 0.008 0.010 l1 0.05 0.20 0.002 0.008 e1 2xb seating plane r0.1 c 8 7 l d e 0.15 0.20 c c a a b b b a c a l1 m m figure 10. footprint (dimensions in mm) figure 11. marking 0.7 0.3 2 pin 1 pin 2 1x
package information esda-1k 6/10 doc id 17883 rev 1 figure 12. tape and reel specification user direction of unreeling all dimensions are typical values in mm 4.10 4.0 2.0 8.0 1.75 3.5 ? 1.50 0.73 0.90 0.22 1.35 0.50
esda-1k recommendation on pcb assembly doc id 17883 rev 1 7/10 4 recommendation on pcb assembly 4.1 solder paste 1. use halide-free flux, qualification rol0 according to ansi/j-std-004. 2. ?no clean? solder paste recommended. 3. offers a high tack force to resist component displacement during pcb movement. 4. use solder paste with fine particles: powder particle size 20-45 m. 4.2 placement 1. manual positioning is not recommended. 2. it is recommended to use the lead recognition capabilities of the placemen t system, not the outline centering. 3. standard tolerance of 0.05 mm is recommended. 4. 3.5 n placement force is recommended. too much placement force can lead to squeezed out solder paste and cause solder joints to short. too low placement force can lead to insufficient contact between package and solder paste that could cause open solder joints or badly centered packages. 5. to improve the package placement accuracy, a bottom side optical control should be performed with a high resolution tool. 6. for assembly, a perfect supporting of the pcb (all the more on flexible pcb) is recommended during solder paste printing, pick and place and reflow soldering by using optimized tools. 4.3 pcb design preference 1. to control the solder paste amount, the closed via is recommended instead of open vias. 2. the position of tracks and open vias in the solder area should be well balanced. the symmetrical layout is recommended, in case any tilt phenomena caused by asymmetrical solder paste amount due to the solder flow away.
recommendation on pcb assembly esda-1k 8/10 doc id 17883 rev 1 4.4 reflow profile figure 13. st ecopack? recommended soldering reflow profile for pcb mounting note: minimize air convection currents in the reflow oven to avoid component movement. 0 01234567 time (min) temperature (c) 2c/s recommended 6c/s max 220c 125 c 260c max 255c 180c 90 sec max 10-30 sec 90 to 150 sec 3c/s max 0 01234567 time (min) temperature (c) 2c/s recommended 6c/s max 220c 125 c 260c max 255c 180c 90 sec max 10-30 sec 90 to 150 sec 3c/s max
esda-1k ordering information doc id 17883 rev 1 9/10 5 ordering information note: the marking can be rotated by multiples of 90 to differentiate assembly location. 6 revision history table 5. ordering information order code marking package weight base qty delivery mode esda12-1k 12 sod-523 1.46 3000 tape and reel ESDA18-1K 18 table 6. document revision history date revision changes 02-sep-2010 1 first issue.
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